Issued date: 28-Apr-2023 | Response Date: 12-May-2023
The Indian Navy has issued a RFP / Tender for Design & Development of FPGA MPSoC based I/O solution for Avionic Interface.
Brief scope of project includes – design, development and production of 04 units.
The embedded solution will host modular programmable Logic PL blocks for Avionic Interfaces Viz. MIL1553B, ARINC429 and RS422. The PL blocks and processor would be integrated to custom logic (given by WESEE) for real time computations. /the scope of joint development and deliverables of the solution would encompass the following:
- Development of FPGA deployable IP cores for transceiver for ARINC429, MIL 1553B, RS422, Ethernet Interface Standards and DP1.2 display standard.
- Integration of IP cores with WESEE’s custom logic and handing over of complete source code.
- Designing of PCB which should be realizable based on requirement and components selection.
- Design of end to end solution (PoC Only) which would include power supplies arrangements, mechanical integration and packaging